### Abstract

Stochastic logic performs computation on data represented by random bit-streams. The representation allows complex arithmetic to be performed with very simple logic, but it suffers from high latency and poor precision. Furthermore, the results are always somewhat inaccurate due to random fluctuations. In this paper, we show that randomness is not a requirement for this computational paradigm. If properly structured, the same arithmetical constructs can operate on deterministic bit-streams, with the data represented uniformly by the fraction of 1's versus 0's. This paper presents three approaches for the computation: relatively prime stream lengths, rotation, and clock division. Unlike stochastic methods, all three of our deterministic methods produce completely accurate results. The cost of generating the deterministic streams is a small fraction of the cost of generating streams from random/pseudorandom sources. Most importantly, the latency is reduced by a factor of (1/2n), where n is the equivalent number of bits of precision. When computing in unary, the bit-stream length increases with each level of logic. This is an inevitable consequence of the representation, but it can result in unmanageable bit-stream lengths. We discuss two methods for maintaining constant bit-streams lengths via approximations, based on low-discrepancy sequences. These methods provide the best accuracy and area × delay product. They are fast-converging and therefore offer progressive precision.

Original language | English (US) |
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Article number | 8793244 |

Pages (from-to) | 2925-2938 |

Number of pages | 14 |

Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |

Volume | 27 |

Issue number | 12 |

DOIs | |

State | Published - Dec 2019 |

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### Keywords

- Deterministic computing
- fast-converging process
- low-discrepancy (LD) bit-streams
- pseudorandomized bit-stream
- stochastic computing
- unary bit-streams

### Cite this

*IEEE Transactions on Very Large Scale Integration (VLSI) Systems*,

*27*(12), 2925-2938. [8793244]. https://doi.org/10.1109/TVLSI.2019.2929354