Performance Evaluation of Wire-Limited Hierarchical Networks

William Tsun Yuk Hsu, Pen Chung Yew

Research output: Contribution to journalArticlepeer-review

7 Scopus citations

Abstract

In the study of multiprocessor networks, attention must be paid to the effects of packaging constraints on cost and performance as well as the physical hierarchy imposed by packaging. Given wiring costs and constraints, hierarchical or clustered networks are a promising approach to building multiprocessor interconnects. We examine a simple approach to clustering: local buses connect processors within a cluster, and intercluster networks such ask-aryn-cubes and generalized shuffle-exchange networks provide connections between clusters. We perform detailed queueing analysis and simulations and compare the performance of a variety of flat and clustered networks. Previously, hierarchical networks were believed to be beneficial only for traffic with good locality. Under wiring cost models, we find that hierarchical networks may have superior performance to nonhierarchical networks, even under uniform traffic (which previously was believed to be a "worst case" scenario for hierarchical topologies). Relative performance is dependent on the cost constraint used, the system configuration and message granularity. The choice of a multiprocessor interconnect must take into consideration all these factors.

Original languageEnglish (US)
Pages (from-to)156-172
Number of pages17
JournalJournal of Parallel and Distributed Computing
Volume41
Issue number2
DOIs
StatePublished - Mar 15 1997

Bibliographical note

Funding Information:
1This work was supported in part by the National Science Foundation under Grants US NSF MIP-9496320, US NSF CDA-9502979, and NSF MIP-9496320.

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