Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits

Arvind K Sharma, Meghna Madhusudan, Steven M. Burns, Soner Yaldiz, Parijat Mukherjee, Ramesh Harjani, Sachin S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Scopus citations

Abstract

The common-centroid (CC) layout style is widely used to minimize the impact of variations among matched devices in analog blocks such as current mirror banks and differential pairs. This paper presents a constructive, performance-aware CC placement and routing algorithm for transistor arrays. Specifically, the proposed approach maximizes diffusion sharing, incorporates length of diffusion (LOD) based stress-induced performance variations, and mitigates resistive parasitics and electromigration (EM) hotspots, all of which are critical in modern technology nodes. The proposed algorithms are validated using cell- and circuit-level test cases in a commercial 12nm FinFET process. As compared to existing works, the cells generated using the proposed approach are shown to provide better performance in the presence of systematic variations, LOD, layout parasitics, and EM-induced degradation.

Original languageEnglish (US)
Title of host publication2021 40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665445078
DOIs
StatePublished - 2021
Event40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021 - Munich, Germany
Duration: Nov 1 2021Nov 4 2021

Publication series

NameIEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
Volume2021-November
ISSN (Print)1092-3152

Conference

Conference40th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2021
Country/TerritoryGermany
CityMunich
Period11/1/2111/4/21

Bibliographical note

Funding Information:
This work is supported in part by the DARPA IDEA program, as part of the ALIGN project, under SPAWAR Contract N660011824048.

Publisher Copyright:
©2021 IEEE

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