Abstract
The thermal problem has been emerged as one of the key issues for next-generation IC design. In this paper, we propose a scheme to achieve better thermal distribution for partition-driven standard cell placement. The proposed heuristic uses a multigrid-like method that simplifies the thermal equation at each level of partitioning and makes it possible to incorporate temperature considerations directly as placement constraints, thus leading to better thermal distribution. Our experimental results verify the effectiveness of our scheme. We also describe an algorithm to derive a compact thermal model with a complexity of O(mn + m2), where m is the number of the mesh nodes on the substrate surface and n is the number of all internal mesh nodes.
Original language | English (US) |
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Title of host publication | Proceedings of the International Symposium on Physical Design |
Pages | 75-80 |
Number of pages | 6 |
State | Published - Jul 28 2003 |
Event | 2003 International Symposium on Physical Design - Monterey, CA, United States Duration: Apr 6 2003 → Apr 9 2003 |
Other
Other | 2003 International Symposium on Physical Design |
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Country/Territory | United States |
City | Monterey, CA |
Period | 4/6/03 → 4/9/03 |
Keywords
- Partition
- Placement
- Standard cell
- Temperature
- Thermal model
- VLSI