PaReNTT: Low-Latency Parallel Residue Number System and NTT-Based Long Polynomial Modular Multiplication for Homomorphic Encryption

Keyphrases

• Low Latency 100%
• Residue number System 100%
• Homomorphic Encryption 100%
• Modular Polynomial multiplication 100%
• Number Theoretic Transform 100%
• Area-time Product 60%
• Proposed Architecture 40%
• Chinese Remainder Theorem 40%
• Residual Polynomial 40%
• Novel Architectures 20%
• Post-processing Techniques 20%
• Latency 20%
• Parallel Architecture 20%
• Xilinx Virtex 20%
• Reduced Latency 20%
• High-sample Rate 20%
• Area Consumption 20%
• Buffer Requirements 20%
• Hardware Architecture 20%
• Polynomial multiplication 20%
• Feedforward Architecture 20%
• Signed Power-of-two 20%
• UltraScale+ 20%
• Lattice-based Cryptosystem 20%

Computer Science

• Number System 100%
• Homomorphic Encryption 100%
• Preprocessing 100%
• Pipelining 50%
• Parallel Architectures 50%
• Clock Cycle 50%
• Postprocessing 50%
• Postprocessing Step 50%
• Table Lookup 50%
• Hardware Architecture 50%
• Field Programmable Gate Arrays 50%