TY - GEN
T1 - Parallel architecture for a multiple-input fuzzy logic controller
AU - Stachowicz, Marian S.
AU - Grantner, Janos
AU - Kinney, Larry L.
PY - 1992/1/1
Y1 - 1992/1/1
N2 - A hardware accelerator that performs fuzzy learning, fuzzy inference, and defuzzification strategy computations is presented. The hardware is based on two-valued logic. A universal space of 25 elements with five levels each is supported. To achieve a high processing rate for real-time applications, the basic units of the accelerator are connected in a four-level pipeline. The accelerator can receive two parallel fuzzy data as inputs. A flag will be set if the fuzzy model R(u,w), constructed in a learning process, exhibits the property as follows: for all (u,w) belonging to the set U×W, R(u,w) = 1. At a clock rate of 20 MHz, the accelerator can perform more than 1,400,000 fuzzy logic inferences per second on multi-dimensional fuzzy data.
AB - A hardware accelerator that performs fuzzy learning, fuzzy inference, and defuzzification strategy computations is presented. The hardware is based on two-valued logic. A universal space of 25 elements with five levels each is supported. To achieve a high processing rate for real-time applications, the basic units of the accelerator are connected in a four-level pipeline. The accelerator can receive two parallel fuzzy data as inputs. A flag will be set if the fuzzy model R(u,w), constructed in a learning process, exhibits the property as follows: for all (u,w) belonging to the set U×W, R(u,w) = 1. At a clock rate of 20 MHz, the accelerator can perform more than 1,400,000 fuzzy logic inferences per second on multi-dimensional fuzzy data.
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M3 - Conference contribution
AN - SCOPUS:0026698534
SN - 0819408727
T3 - Proceedings of SPIE - The International Society for Optical Engineering
SP - 137
EP - 145
BT - Proceedings of SPIE - The International Society for Optical Engineering
A2 - Biswas, Gautam
PB - Publ by Int Soc for Optical Engineering
T2 - Applications of Artificial Intelligence X: Knowledge-Based Systems
Y2 - 22 April 1992 through 24 April 1992
ER -