TY - GEN
T1 - Parallel adaptive decision feedback equalizers
AU - Raghunath, K. J.
AU - Parhi, Keshab K
PY - 1992/1/1
Y1 - 1992/1/1
N2 - Achieving high speed in decision feedback equalizers (DFEs) is difficult because of the nonlinear decision directed adaptation. Recently, parallel DFE and extended LMS DFE algorithms were proposed for parallel implementation of DFEs. A new double-row DFE algorithm which outperforms the previous approaches is presented. Under the no error propagation assumption, this algorithm performs exactly like a serial DFE. The above three algorithms degrade drastically at high speeds and are more computationally expensive. Three additional novel parallel implementations of the DFE which lead to considerable hardware savings and avoid the coding loss of the former approaches are proposed. These new algorithms are referred to as the direct parallel, double-row DFE without weight correction, and improved block techniques. The first two algorithms give performance that is only slightly degraded as compared to the earlier methods. The improved block technique provides the best performance at higher speed.
AB - Achieving high speed in decision feedback equalizers (DFEs) is difficult because of the nonlinear decision directed adaptation. Recently, parallel DFE and extended LMS DFE algorithms were proposed for parallel implementation of DFEs. A new double-row DFE algorithm which outperforms the previous approaches is presented. Under the no error propagation assumption, this algorithm performs exactly like a serial DFE. The above three algorithms degrade drastically at high speeds and are more computationally expensive. Three additional novel parallel implementations of the DFE which lead to considerable hardware savings and avoid the coding loss of the former approaches are proposed. These new algorithms are referred to as the direct parallel, double-row DFE without weight correction, and improved block techniques. The first two algorithms give performance that is only slightly degraded as compared to the earlier methods. The improved block technique provides the best performance at higher speed.
UR - http://www.scopus.com/inward/record.url?scp=85019634852&partnerID=8YFLogxK
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U2 - 10.1109/ICASSP.1992.226363
DO - 10.1109/ICASSP.1992.226363
M3 - Conference contribution
AN - SCOPUS:85019634852
T3 - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
SP - 353
EP - 356
BT - ICASSP 1992 - 1992 International Conference on Acoustics, Speech, and Signal Processing
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 1992
Y2 - 23 March 1992 through 26 March 1992
ER -