Parallel Adaptive Decision Feedback Equalizers

Kalavai J. Raghunath, Keshab K. Parhi

Research output: Contribution to journalArticlepeer-review

20 Scopus citations


Achieving high speed in decision feedback equalizers (DFE's) is difficult because of the nonlinear decision directed adaptation. Recently, parallel DFE and extended LMS DFE algorithms were proposed for parallel implementation of DFE's. In this correspondence, we first present a new double-row DFE algorithm which outperforms the previous approaches. Under the no error propagation assumption, our algorithm will perform exactly like a serially adapting DFE. The multiplication complexity of the double-row DFE algorithm is of the same order as the parallel DFE algorithm and the extended LMS method. The previous algorithms and the double-row DFE algorithm may become impractical to implement due to their large computational complexity. We propose three additional novel parallel implementations of the DFE which lead to considerable hardware savings and avoid the coding loss of the former approaches. The different algorithms are compared on the basis of convergence analysis and simulation results.

Original languageEnglish (US)
Pages (from-to)1956-1961
Number of pages6
JournalIEEE Transactions on Signal Processing
Issue number5
StatePublished - May 1993

Bibliographical note

Funding Information:
Adaptive equalization is used to compensate for the time dispersion introduced by the channel. One of the most widely used equalizers is the decision feedback equalizer (DFE) (Fig. 1). The DFE uses a nonlinear decision element at the output, and the output represents a noise-free replica of the transmitted symbol assuming that the probability of an erroneous output is small [ 11, [2]. The filter coefficients are updated according to the LMS algorithm using the difference across the nonlinear element e(n) as the error. The rapidly increasing need for high speed communications and the recent interest in the development of high density storage units [3] motivates the development of high sampling rate DFE’s. While there have been considerable advances in pipelined implementations of feedforward equalizers, achieving high speed in DFE’s remains a difficult task because of the nonlinear nature of the decision directed adaptation. Block processing using look-ahead computation [4],[ 5] cannot be directly used since the output of the DFE is not a linear function of the filter coefficients. Delayed block processing techniques [6], [7] do not track time varying channels effectively (since the filter coefficients or weights are adapted only once every Nth sample, where N is the block size), and are not useful for high speed implementation of DFE’s. A method of pipelining algorithms with quantizer loops was recently proposed in [8]. Here, using look-ahead computation, loops containing nonlinear devices are transformed to equivalent forms which contain no nonlinear operation. But such implementations are practical only for low order DFE’s since the hardware complexity can become enormous for higher order filters. A parallel DFE algorithm was recently proposed in [9] and was modified as extended LMS DFE algorithm in [IO]. It was shown that these algorithms perform effectively while the reduced rate DFE algorithm failed to converge. In these algorithms, the input channel data samples are broken into M blocks of N samples each and processed by M DFE’s in parallel. At the start of each block, Manuscript received August 23, 1991; revised July 1, 1992. The associate editor coordinating the review of this correspondence and approving it for publication was Dr. Hong Fan. This work was supported by the Office of Naval Research under Contract NOOO14-91-J-1008. The authors are with the Department of Electrical Engineering, University of Minnesota, Minneapolis, MN 55455. IEEE Log Number 9207549.


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