Outlook and opportunities for hetero-epitaxy in SI CMOS technology and beyond

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An overview of promising applications of Si/SiGe hetero-epitaxy for mainstream CMOS technology is presented. First, near-term applications of SiGe hetero-epitaxy, such as raised SiGe source-drain contacts, are reviewed. Next, the application of hetero-epitaxy to strained Si CMOS is reviewed, including a discussion of devices that utilize both global and local strain. Quantum well heterostructure devices such as buried-channel MOSFETs and MODFETs are also reviewed. Finally, novel hetero-epitaxial devices that could be enabled by the widespread availability of hetero-epitaxy in CMOS technology are described.

Original languageEnglish (US)
Title of host publicationSiGe
Subtitle of host publicationMaterials, Processing, and Devices - Proceedings of the First Symposium
EditorsD. Harame, J. Boquet, J. Cressler, D. Houghton, H. Iwai, T.-J. King, G. Masini, J. Murota, K. Rim, B. Tillack
Pages785-788
Number of pages4
Volume7
StatePublished - Dec 1 2004
EventSiGe: Materials, Processing, and Devices - Proceedings of the First Symposium - Honolulu, HI, United States
Duration: Oct 3 2004Oct 8 2004

Other

OtherSiGe: Materials, Processing, and Devices - Proceedings of the First Symposium
CountryUnited States
CityHonolulu, HI
Period10/3/0410/8/04

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