Abstract
An overview of promising applications of Si/SiGe hetero-epitaxy for mainstream CMOS technology is presented. First, near-term applications of SiGe hetero-epitaxy, such as raised SiGe source-drain contacts, are reviewed. Next, the application of hetero-epitaxy to strained Si CMOS is reviewed, including a discussion of devices that utilize both global and local strain. Quantum well heterostructure devices such as buried-channel MOSFETs and MODFETs are also reviewed. Finally, novel hetero-epitaxial devices that could be enabled by the widespread availability of hetero-epitaxy in CMOS technology are described.
Original language | English (US) |
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Title of host publication | SiGe |
Subtitle of host publication | Materials, Processing, and Devices - Proceedings of the First Symposium |
Editors | D. Harame, J. Boquet, J. Cressler, D. Houghton, H. Iwai, T.-J. King, G. Masini, J. Murota, K. Rim, B. Tillack |
Pages | 785-788 |
Number of pages | 4 |
Volume | 7 |
State | Published - Dec 1 2004 |
Event | SiGe: Materials, Processing, and Devices - Proceedings of the First Symposium - Honolulu, HI, United States Duration: Oct 3 2004 → Oct 8 2004 |
Other
Other | SiGe: Materials, Processing, and Devices - Proceedings of the First Symposium |
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Country/Territory | United States |
City | Honolulu, HI |
Period | 10/3/04 → 10/8/04 |