Abstract
In this article, we report the fabrication of organic field-effect transistors using self-assembled SiO 2 as a gate dielectric material and pentacene as a semiconductor. The dielectric layer was self-assembled with 10 layers of SiO 2 nanoparticles 45 nm in diameter, and its breakdown field was larger than 0.57 MV/cm. Being a low-cost and low-temperature process, the layer-by-layer self-assembly is particularly suitable for organic field-effect transistor fabrication. The pentacene was thermally evaporated on the substrate under high vacuum at the room temperature. The fabricated transistor has a threshold voltage of 0.3 V, field-effect mobility of 0.05 cm 2/Vs, and slope of 1.4 V/decade.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 525-528 |
| Number of pages | 4 |
| Journal | Journal of Nanoscience and Nanotechnology |
| Volume | 3 |
| Issue number | 6 |
| DOIs | |
| State | Published - Dec 2003 |
Keywords
- Organic Field-Effect Transistor
- Pentacene
- Self-assembly
- SiO Nanoparticle