Abstract
A technique for the early estimation of congestion after the floorplanning phase is proposed in this paper, based on which an optimized pin assignment algorithm is implemented, aiming at reducing the routing congestion. Experiments show that the optimized pin locations will effectively reduce the total routing congestion violations, and the algorithm complexity is reasonable for application to benchmark circuits.
| Original language | English (US) |
|---|---|
| Pages | 17-21 |
| Number of pages | 5 |
| DOIs | |
| State | Published - 2002 |
| Event | 2002 International Workshop on SystemLevel Interconnect Prediction - Del Mar, CA, United States Duration: Apr 6 2002 → Apr 7 2002 |
Other
| Other | 2002 International Workshop on SystemLevel Interconnect Prediction |
|---|---|
| Country/Territory | United States |
| City | Del Mar, CA |
| Period | 4/6/02 → 4/7/02 |
Keywords
- Algorithms