TY - GEN
T1 - Optimization of staggered heterojunction p-TFETs for LSTP and LOP applications
AU - Baravelli, E.
AU - Gnani, E.
AU - Grassi, R.
AU - Gundi, A.
AU - Baccarani, G.
PY - 2013
Y1 - 2013
N2 - Effect of transverse quantization on the broken vs. staggered band lineup of InAs/Al xGa1-xSb TFETs is investigated, showing that cross-sections up to 1 0nm lead to staggered configurations for any value of the Al mole fraction x. Device performance is optimized as a function of cross-sectional size, Al content and possible source/channel underlap, while ensuring low standby power (LSTP) or low operating power (LOP) compatible off-current levels. Guidelines are provided and an 'optimal' design is proposed which provides a minimum sub-threshold slope (SS) of 7.2 mV/dec along with a maximum on-state current (IOn) of 175μ/μm.
AB - Effect of transverse quantization on the broken vs. staggered band lineup of InAs/Al xGa1-xSb TFETs is investigated, showing that cross-sections up to 1 0nm lead to staggered configurations for any value of the Al mole fraction x. Device performance is optimized as a function of cross-sectional size, Al content and possible source/channel underlap, while ensuring low standby power (LSTP) or low operating power (LOP) compatible off-current levels. Guidelines are provided and an 'optimal' design is proposed which provides a minimum sub-threshold slope (SS) of 7.2 mV/dec along with a maximum on-state current (IOn) of 175μ/μm.
UR - http://www.scopus.com/inward/record.url?scp=84890066227&partnerID=8YFLogxK
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U2 - 10.1109/DRC.2013.6633796
DO - 10.1109/DRC.2013.6633796
M3 - Conference contribution
AN - SCOPUS:84890066227
SN - 9781479908110
T3 - Device Research Conference - Conference Digest, DRC
SP - 67
EP - 68
BT - 71st Device Research Conference, DRC 2013 - Conference Digest
T2 - 71st Device Research Conference, DRC 2013
Y2 - 23 June 2013 through 26 June 2013
ER -