Optimization of n-and p-type TFETs integrated on the same InAs/Al xGa1-xSb technology platform

Emanuele Baravelli; Elena Gnani; Roberto Grassi; Antonio Gnudi; Susanna Reggiani; Giorgio Baccarani

doi:10.1109/TED.2013.2289739

Optimization of n-and p-type TFETs integrated on the same InAs/Al _xGa_1-xSb technology platform

Emanuele Baravelli, Elena Gnani, Roberto Grassi, Antonio Gnudi, Susanna Reggiani, Giorgio Baccarani

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

46 Scopus citations

Abstract

Design of a suitable technology platform is carried out in this paper for co-integration of simultaneously optimized n-and p-type tunnel field-effect transistors (TFETs). InAs/Al_xGa_1-xSb heterostructures are considered, and a 3-D full-quantum simulation approach is adopted to investigate the combined effect of Al mole fraction x and transverse quantization on band lineups at the heterojunction. Design optimization leads to a TFET pair with similar dimensions and feasible aspect ratios realized on the same InAs/Al _0.05Ga_0.95Sb platform. These devices exhibit average subthreshold slopes below 60 mV/dec and relatively high ON-currents of 270 (n-TFET) and 120 μA/μm (p-TFET) at a low-supply voltage V_DD =0.4 V. Combined ON-and OFF-state performance of the proposed technology platform is expected to be compatible with low operating power applications, while potential candidates for low standby power scenarios are obtained by reducing TFET cross sections from 10 to 7 nm.

Original language	English (US)
Article number	6670064
Pages (from-to)	178-185
Number of pages	8
Journal	IEEE Transactions on Electron Devices
Volume	61
Issue number	1
DOIs	https://doi.org/10.1109/TED.2013.2289739
State	Published - Jan 2014

Keywords

III-V materials
TFET
heterojunction
subthreshold slope (SS)

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10.1109/TED.2013.2289739

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title = "Optimization of n-and p-type TFETs integrated on the same InAs/Al xGa1-xSb technology platform",

abstract = "Design of a suitable technology platform is carried out in this paper for co-integration of simultaneously optimized n-and p-type tunnel field-effect transistors (TFETs). InAs/AlxGa1-xSb heterostructures are considered, and a 3-D full-quantum simulation approach is adopted to investigate the combined effect of Al mole fraction x and transverse quantization on band lineups at the heterojunction. Design optimization leads to a TFET pair with similar dimensions and feasible aspect ratios realized on the same InAs/Al 0.05Ga0.95Sb platform. These devices exhibit average subthreshold slopes below 60 mV/dec and relatively high ON-currents of 270 (n-TFET) and 120 μA/μm (p-TFET) at a low-supply voltage VDD =0.4 V. Combined ON-and OFF-state performance of the proposed technology platform is expected to be compatible with low operating power applications, while potential candidates for low standby power scenarios are obtained by reducing TFET cross sections from 10 to 7 nm.",

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AU - Gnani, Elena

AU - Grassi, Roberto

AU - Gnudi, Antonio

AU - Reggiani, Susanna

AU - Baccarani, Giorgio

PY - 2014/1

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N2 - Design of a suitable technology platform is carried out in this paper for co-integration of simultaneously optimized n-and p-type tunnel field-effect transistors (TFETs). InAs/AlxGa1-xSb heterostructures are considered, and a 3-D full-quantum simulation approach is adopted to investigate the combined effect of Al mole fraction x and transverse quantization on band lineups at the heterojunction. Design optimization leads to a TFET pair with similar dimensions and feasible aspect ratios realized on the same InAs/Al 0.05Ga0.95Sb platform. These devices exhibit average subthreshold slopes below 60 mV/dec and relatively high ON-currents of 270 (n-TFET) and 120 μA/μm (p-TFET) at a low-supply voltage VDD =0.4 V. Combined ON-and OFF-state performance of the proposed technology platform is expected to be compatible with low operating power applications, while potential candidates for low standby power scenarios are obtained by reducing TFET cross sections from 10 to 7 nm.

AB - Design of a suitable technology platform is carried out in this paper for co-integration of simultaneously optimized n-and p-type tunnel field-effect transistors (TFETs). InAs/AlxGa1-xSb heterostructures are considered, and a 3-D full-quantum simulation approach is adopted to investigate the combined effect of Al mole fraction x and transverse quantization on band lineups at the heterojunction. Design optimization leads to a TFET pair with similar dimensions and feasible aspect ratios realized on the same InAs/Al 0.05Ga0.95Sb platform. These devices exhibit average subthreshold slopes below 60 mV/dec and relatively high ON-currents of 270 (n-TFET) and 120 μA/μm (p-TFET) at a low-supply voltage VDD =0.4 V. Combined ON-and OFF-state performance of the proposed technology platform is expected to be compatible with low operating power applications, while potential candidates for low standby power scenarios are obtained by reducing TFET cross sections from 10 to 7 nm.

KW - III-V materials

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KW - heterojunction

KW - subthreshold slope (SS)

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