Optimal design of JPEG hardware under the approximate computing paradigm

Farhana Sharmin Snigdha; Deepashree Sengupta; Jiang Hu; Sachin S Sapatnekar

doi:10.1145/2897937.2898057

Optimal design of JPEG hardware under the approximate computing paradigm

Farhana Sharmin Snigdha, Deepashree Sengupta, Jiang Hu, Sachin S Sapatnekar

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

21 Scopus citations

Abstract

JPEG compression based on the discrete cosine transform (DCT) is a key building block in low-power multimedia applications. We use approximate computing to exploit the error tolerance of JPEG and formulate a novel optimization problem that maximizes power savings under an error budget. We analyze the error propagation sensitivity in the DCT network and use this information to model the impact of introduced errors on the output quality. Simulations show up to 15% reduction in area and delay which corresponds to 40% power savings at iso-delay.

Original language	English (US)
Title of host publication	Proceedings of the 53rd Annual Design Automation Conference, DAC 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781450342360
DOIs	https://doi.org/10.1145/2897937.2898057
State	Published - Jun 5 2016
Event	53rd Annual ACM IEEE Design Automation Conference, DAC 2016 - Austin, United States Duration: Jun 5 2016 → Jun 9 2016

Publication series

Name	Proceedings - Design Automation Conference
Volume	05-09-June-2016
ISSN (Print)	0738-100X

Other

Other	53rd Annual ACM IEEE Design Automation Conference, DAC 2016
Country/Territory	United States
City	Austin
Period	6/5/16 → 6/9/16

Bibliographical note

Publisher Copyright:
© 2016 ACM.

Keywords

Approximate computing
Image compression
JPEG
Low-power design
Nonlinear optimization

Publisher link

10.1145/2897937.2898057

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Snigdha, F. S., Sengupta, D., Hu, J., & Sapatnekar, S. S. (2016). Optimal design of JPEG hardware under the approximate computing paradigm. In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016 [a106] (Proceedings - Design Automation Conference; Vol. 05-09-June-2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/2897937.2898057

Optimal design of JPEG hardware under the approximate computing paradigm. / Snigdha, Farhana Sharmin; Sengupta, Deepashree; Hu, Jiang et al.

Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. Institute of Electrical and Electronics Engineers Inc., 2016. a106 (Proceedings - Design Automation Conference; Vol. 05-09-June-2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Snigdha, FS, Sengupta, D, Hu, J & Sapatnekar, SS 2016, Optimal design of JPEG hardware under the approximate computing paradigm. in Proceedings of the 53rd Annual Design Automation Conference, DAC 2016., a106, Proceedings - Design Automation Conference, vol. 05-09-June-2016, Institute of Electrical and Electronics Engineers Inc., 53rd Annual ACM IEEE Design Automation Conference, DAC 2016, Austin, United States, 6/5/16. https://doi.org/10.1145/2897937.2898057

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AB - JPEG compression based on the discrete cosine transform (DCT) is a key building block in low-power multimedia applications. We use approximate computing to exploit the error tolerance of JPEG and formulate a novel optimization problem that maximizes power savings under an error budget. We analyze the error propagation sensitivity in the DCT network and use this information to model the impact of introduced errors on the output quality. Simulations show up to 15% reduction in area and delay which corresponds to 40% power savings at iso-delay.

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Optimal design of JPEG hardware under the approximate computing paradigm

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