@inproceedings{c886ab6902a44ea7b58b02fe0c318960,
title = "On the high-speed VLSI implementation of errors-and-erasures correcting Reed-Solomon decoders",
abstract = "Recently a novel algorithm transformation was proposed to reduce the critical path of Berlekamp-Massey algorithm implementation for errors-alone Reed-Solomon decoding. In this paper, we apply the same methodology to transform the Berlekamp-Massey algorithm for errors-and-erasures RS decoding. We present a regular hardware architecture to implement the reformulated Berlekamp-Massey algorithm, which can achieve high throughput. Moreover, an operation scheduling scheme is proposed to further reduce the hardware complexity without loss of throughput.",
keywords = "Berlekamp-massey algorithm, Erasure, Reed-solomon codes, VLSI architectures",
author = "Tong Zhang and Parhi, {Keshab K.}",
year = "2002",
month = apr,
day = "18",
doi = "10.1145/505306.505326",
language = "English (US)",
series = "GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI",
publisher = "Association for Computing Machinery, Inc",
pages = "89--93",
booktitle = "GLSVLSI 2002 - Proceedings of the 12th ACM Great Lakes Symposium on VLSI",
note = "12th ACM Great Lakes Symposium on VLSI, GLSVLSI 2002 ; Conference date: 18-04-2002 Through 19-04-2002",
}