Abstract
In this work, we present a hardware-efficient architecture for pedestrian detection with neuromorphic Dynamic Vision Sensors (DVSs), asynchronous camera sensors that report discrete changes in light intensity. These imaging sensors have many advantages compared to traditional frame-based cameras, such as increased dynamic range, lower bandwidth requirements, and higher sampling frequency with lower power consumption. Our architecture is composed of two main components: an event filtering stage to denoise the input image stream followed by a low-complexity neural network. For the first stage, we use a novel point-process filter (PPF) with an adaptive temporal windowing scheme that enhances classification accuracy. The second stage implements a hardware-efficient Binary Neural Network (BNN) for classification. To demonstrate the reduction in complexity achieved by our architecture, we showcase a Field-Programmable Gate Array (FPGA) implementation of the entire system which obtains a 86 reduction in latency compared to current neural network floating-point architectures.
Original language | English (US) |
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Title of host publication | 2020 IEEE International Conference on Image Processing, ICIP 2020 - Proceedings |
Publisher | IEEE Computer Society |
Pages | 3084-3088 |
Number of pages | 5 |
ISBN (Electronic) | 9781728163956 |
DOIs | |
State | Published - Oct 2020 |
Event | 2020 IEEE International Conference on Image Processing, ICIP 2020 - Virtual, Abu Dhabi, United Arab Emirates Duration: Sep 25 2020 → Sep 28 2020 |
Publication series
Name | Proceedings - International Conference on Image Processing, ICIP |
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Volume | 2020-October |
ISSN (Print) | 1522-4880 |
Conference
Conference | 2020 IEEE International Conference on Image Processing, ICIP 2020 |
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Country/Territory | United Arab Emirates |
City | Virtual, Abu Dhabi |
Period | 9/25/20 → 9/28/20 |
Bibliographical note
Publisher Copyright:© 2020 IEEE.
Keywords
- FPGA
- binary neural networks
- dynamic vision sensors
- embedded systems
- pedestrian detection