Abstract
The convolutional codes are widely used in many communication systems due to their excellent error control performance. High speed Viterbi decoders for convolutional codes are of great interest for high data rate applications. In this paper, an improved most-significant-bit (MSB)-first bit-level pipelined add-compare select (ACS) unit structure is proposed. The ACS unit is the main bottleneck on the decoding speed of a Viterbi decoder. By balancing the. settling time of different paths in the ACS unit, the length of the critical path is reduced as close as possible to the iteration bound in the ACS unit. With the proposed retimed structure, it is possible to decrease the critical path of the ACS unit by 12 to 15% compared with the conventional MSB-first structures. This reduction in critical path can reduce the level of parallelism (and area) required for a very high-speed (such as 10Gbps) Viterbi decoder by about 25%.
| Original language | English (US) |
|---|---|
| Pages (from-to) | II501-II504 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 2 |
| State | Published - Sep 7 2004 |
| Event | 2004 IEEE International Symposium on Circuits and Systems - Proceedings - Vancouver, BC, Canada Duration: May 23 2004 → May 26 2004 |