Multi-level signaling for energy-efficient on-chip interconnects

Fakhrul Zaman Rokhani, Gerald E Sobelman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

In this paper, we develop multi-level signaling schemes for on-chip interconnects in order to achieve energy-efficient communication. The methodology uses both bus multiplexing and low-swing signaling characteristics, while keeping the total bus area fixed. A physics-based energy model for coupling capacitance is developed which accurately captures the energy consumption of very deep sub-micron (VDSM) on-chip interconnect in the context of multi-level signals. Results show that our proposed bus achieves energy savings for intermediate-layer interconnect lines of as much as 76% compared to binary signaling. In addition, wire bandwidth is improved by up to 16% compared to prior approaches.

Original languageEnglish (US)
Title of host publicationASICON 2007 - 2007 7th International Conference on ASIC Proceeding
Pages82-85
Number of pages4
DOIs
StatePublished - 2007
Event2007 7th International Conference on ASIC, ASICON 2007 - Guilin, China
Duration: Oct 26 2007Oct 29 2007

Publication series

NameASICON 2007 - 2007 7th International Conference on ASIC Proceeding

Other

Other2007 7th International Conference on ASIC, ASICON 2007
CountryChina
CityGuilin
Period10/26/0710/29/07

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