TY - GEN
T1 - Multi-level converter to interface low voltage DC to 3-phase high voltage grid with medium frequency transformer isolation
AU - Iyer, Kartik V.
AU - Mohan, Ned
PY - 2014/2/24
Y1 - 2014/2/24
N2 - This paper presents a single stage, bi-directional multi-level converter topology with a multi-winding medium frequency transformer (MFT) isolation to interface a low voltage DC with a 3-phase high voltage grid. The proposed topology can be used for integrating 3-ph utility grid with various low voltage renewables like solar photovoltaic, fuel cells etc. The transformer secondary windings in each phase have unequal turns ratio. This asymmetry introduced in the transformer turns ratio allows to generate more output voltage levels, using less number of semiconductor switches leading to a reduced footprint. The transformer secondary side has AC-AC converter modules which are pulse width modulated. This results in the elimination of the harmonics at multiples of grid frequency, resulting in reduced size of filter inductance. The paper also shows the winding procedure to interleave the windings resulting in lower leakage inductance to minimize the problem of leakage commutation. The proposed topology is simulated using MATLAB/Simulink.
AB - This paper presents a single stage, bi-directional multi-level converter topology with a multi-winding medium frequency transformer (MFT) isolation to interface a low voltage DC with a 3-phase high voltage grid. The proposed topology can be used for integrating 3-ph utility grid with various low voltage renewables like solar photovoltaic, fuel cells etc. The transformer secondary windings in each phase have unequal turns ratio. This asymmetry introduced in the transformer turns ratio allows to generate more output voltage levels, using less number of semiconductor switches leading to a reduced footprint. The transformer secondary side has AC-AC converter modules which are pulse width modulated. This results in the elimination of the harmonics at multiples of grid frequency, resulting in reduced size of filter inductance. The paper also shows the winding procedure to interleave the windings resulting in lower leakage inductance to minimize the problem of leakage commutation. The proposed topology is simulated using MATLAB/Simulink.
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U2 - 10.1109/IECON.2014.7049208
DO - 10.1109/IECON.2014.7049208
M3 - Conference contribution
AN - SCOPUS:84949926339
T3 - IECON Proceedings (Industrial Electronics Conference)
SP - 4683
EP - 4689
BT - IECON Proceedings (Industrial Electronics Conference)
PB - Institute of Electrical and Electronics Engineers Inc.
ER -