MRAM DTCO and compact models

Jeehwan Song; Jian Ping Wang; Chris H. Kim

doi:10.1109/IEDM13553.2020.9371928

MRAM DTCO and compact models

Jeehwan Song, Jian Ping Wang, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Scopus citations

Abstract

Design-Technology Co-Optimization (DTCO) has become an important design methodology for making early decisions on technology, circuit, and system design parameters. This invited paper introduces various aspects of DTCO for MRAM development, ranging from SPICE compatible Magnetic Tunnel Junction (MTJ) device models, array level spin transfer torque magnetoresistive random access memory (STT-MRAM) power-performance-area (PPA) evaluation, scalability and variability studies of large-scale arrays, and novel read and write circuit techniques.

Original language	English (US)
Title of host publication	2020 IEEE International Electron Devices Meeting, IEDM 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	41.6.1-41.6.4
ISBN (Electronic)	9781728188881
DOIs	https://doi.org/10.1109/IEDM13553.2020.9371928
State	Published - Dec 12 2020
Event	66th Annual IEEE International Electron Devices Meeting, IEDM 2020 - Virtual, San Francisco, United States Duration: Dec 12 2020 → Dec 18 2020

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
Volume	2020-December
ISSN (Print)	0163-1918

Conference

Conference	66th Annual IEEE International Electron Devices Meeting, IEDM 2020
Country/Territory	United States
City	Virtual, San Francisco
Period	12/12/20 → 12/18/20

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported in part by C-SPIN, one of the six SRC STARnet Centers, through MARCO and DARPA and in part by the NSF/SRC E2CDA Program.

Publisher Copyright:
© 2020 IEEE.

Publisher link

10.1109/IEDM13553.2020.9371928

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MRAM DTCO and compact models. / Song, Jeehwan; Wang, Jian Ping ; Kim, Chris H.
2020 IEEE International Electron Devices Meeting, IEDM 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 41.6.1-41.6.4 9371928 (Technical Digest - International Electron Devices Meeting, IEDM; Vol. 2020-December).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Song, J, Wang, JP & Kim, CH 2020, MRAM DTCO and compact models. in 2020 IEEE International Electron Devices Meeting, IEDM 2020., 9371928, Technical Digest - International Electron Devices Meeting, IEDM, vol. 2020-December, Institute of Electrical and Electronics Engineers Inc., pp. 41.6.1-41.6.4, 66th Annual IEEE International Electron Devices Meeting, IEDM 2020, Virtual, San Francisco, United States, 12/12/20. https://doi.org/10.1109/IEDM13553.2020.9371928

@inproceedings{fe3ee5ca1b624323bc8ee8969430ba4a,

title = "MRAM DTCO and compact models",

abstract = "Design-Technology Co-Optimization (DTCO) has become an important design methodology for making early decisions on technology, circuit, and system design parameters. This invited paper introduces various aspects of DTCO for MRAM development, ranging from SPICE compatible Magnetic Tunnel Junction (MTJ) device models, array level spin transfer torque magnetoresistive random access memory (STT-MRAM) power-performance-area (PPA) evaluation, scalability and variability studies of large-scale arrays, and novel read and write circuit techniques.",

author = "Jeehwan Song and Wang, {Jian Ping} and Kim, {Chris H.}",

note = "Funding Information: ACKNOWLEDGMENT This work was supported in part by C-SPIN, one of the six SRC STARnet Centers, through MARCO and DARPA and in part by the NSF/SRC E2CDA Program. Publisher Copyright: {\textcopyright} 2020 IEEE.; 66th Annual IEEE International Electron Devices Meeting, IEDM 2020 ; Conference date: 12-12-2020 Through 18-12-2020",

year = "2020",

month = dec,

day = "12",

doi = "10.1109/IEDM13553.2020.9371928",

language = "English (US)",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "41.6.1--41.6.4",

booktitle = "2020 IEEE International Electron Devices Meeting, IEDM 2020",

}

TY - GEN

T1 - MRAM DTCO and compact models

AU - Song, Jeehwan

AU - Wang, Jian Ping

AU - Kim, Chris H.

N1 - Funding Information: ACKNOWLEDGMENT This work was supported in part by C-SPIN, one of the six SRC STARnet Centers, through MARCO and DARPA and in part by the NSF/SRC E2CDA Program. Publisher Copyright: © 2020 IEEE.

PY - 2020/12/12

Y1 - 2020/12/12

N2 - Design-Technology Co-Optimization (DTCO) has become an important design methodology for making early decisions on technology, circuit, and system design parameters. This invited paper introduces various aspects of DTCO for MRAM development, ranging from SPICE compatible Magnetic Tunnel Junction (MTJ) device models, array level spin transfer torque magnetoresistive random access memory (STT-MRAM) power-performance-area (PPA) evaluation, scalability and variability studies of large-scale arrays, and novel read and write circuit techniques.

AB - Design-Technology Co-Optimization (DTCO) has become an important design methodology for making early decisions on technology, circuit, and system design parameters. This invited paper introduces various aspects of DTCO for MRAM development, ranging from SPICE compatible Magnetic Tunnel Junction (MTJ) device models, array level spin transfer torque magnetoresistive random access memory (STT-MRAM) power-performance-area (PPA) evaluation, scalability and variability studies of large-scale arrays, and novel read and write circuit techniques.

UR - http://www.scopus.com/inward/record.url?scp=85102941757&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85102941757&partnerID=8YFLogxK

U2 - 10.1109/IEDM13553.2020.9371928

DO - 10.1109/IEDM13553.2020.9371928

M3 - Conference contribution

AN - SCOPUS:85102941757

T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 41.6.1-41.6.4

BT - 2020 IEEE International Electron Devices Meeting, IEDM 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 66th Annual IEEE International Electron Devices Meeting, IEDM 2020

Y2 - 12 December 2020 through 18 December 2020

ER -

MRAM DTCO and compact models

Abstract

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