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Modeling within-die spatial correlation effects for process-design co-optimization

  • Paul Friedberg
  • , Yu Cao
  • , Jason Cain
  • , Ruth Wang
  • , Jan Rabaey
  • , Costas Spanos

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Within-die spatial correlation of device parameter values caused by manufacturing variations has a significant impact on circuit performance. Based on experimental and simulation results, we: (1) characterize the spatial correlation of gate length over a full-field range of horizontal and vertical separation; (2) develop a rudimentary spatial correlation model; and (3) investigate its impact an the variability of circuit performance.

Original languageEnglish (US)
Title of host publicationProceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005
Pages516-521
Number of pages6
DOIs
StatePublished - 2005
Externally publishedYes
Event6th International Symposium on Quality Electronic Design, ISQED 2005 - San Jose, CA, United States
Duration: Mar 21 2005 → Mar 23 2005

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other6th International Symposium on Quality Electronic Design, ISQED 2005
Country/TerritoryUnited States
CitySan Jose, CA
Period3/21/05 → 3/23/05

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 9 - Industry, Innovation, and Infrastructure
    SDG 9 Industry, Innovation, and Infrastructure

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