Mobile-PBR: A 28-nm Energy-Efficient Rendering Processor for Photorealistic Augmented Reality With Inverse Rendering and Background Clustering

Shiyu Guo, Yuhao Ju, Xi Chen, Sachin S. Sapatnekar, Jie Gu

Research output: Contribution to journalArticlepeer-review

1 Scopus citations

Abstract

This work presents a low-power physical-based ray-tracing (PBRT) rendering processor for photorealistic augmented reality (AR) rendering applications on mobile devices, referred to as mobile physical-based renderer (Mobile-PBR). By introducing inverse rendering (IR) and background clustering, Mobile-PBR enables complicated photorealistic lighting effects such as reflection, refraction, and shadow with minimum resources on mobile edge devices. The key features of this work include: 1) an ASIC rendering processor that embeds an end-to-end ray-tracing (RT) solution with IR for AR on mobile devices; 2) a reconfigurable mixed-precision processing element (PE) design supporting diverse computing tasks for both IR and RT modes; 3) background clustered field of view (FOV)-focused 3-D construction reducing conventional background scene complexity from O(nlogn) to O(1); 4) scalable partitioning scheme for complex 3-D objects with an average of 13× speed up on test scenes; and 5) use of global RT scheduler (GRTS) and global memory access controller (GMAC) to overcome the challenges of irregular memory access pattern and varied PE runtime with overall 684× speed up compared with the baseline design. A 28-nm test chip was fabricated demonstrating 500- and 1418-frames/s/W power efficiency in IR and RT modes, respectively, achieving 28.8× and 3.95× higher RT rendering efficiency compared with existing ASIC solutions, and having an average performance of 25.8 frames/s on various testing scenes, enabling real-time physical-based RT rendering on mobile edge devices.

Original languageEnglish (US)
Pages (from-to)125-135
Number of pages11
JournalIEEE Journal of Solid-State Circuits
Volume60
Issue number1
DOIs
StatePublished - 2025
Externally publishedYes

Bibliographical note

Publisher Copyright:
© 1966-2012 IEEE.

Keywords

  • 3-D construction
  • deep neural network (DNN)
  • inverse rendering (IR)
  • low-power processor
  • physical-based ray-tracing (RT) rendering
  • system on chip (SoC)

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