Machine Learning for Analog Layout

Steven M. Burns; Hao Chen; Tonmoy Dhar; Ramesh Harjani; Jiang Hu; Nibedita Karmokar; Kishor Kunal; Yaguang Li; Yishuang Lin; Mingjie Liu; Meghna Madhusudan; Parijat Mukherjee; David Z. Pan; Jitesh Poojary; Ramprasath S; Sachin S. Sapatnekar; Arvind K Sharma; Wenbin Xu; Soner Yaldiz; Keren Zhu

doi:10.1007/978-3-031-13074-8_17

Machine Learning for Analog Layout

Steven M. Burns, Hao Chen, Tonmoy Dhar, Ramesh Harjani, Jiang Hu, Nibedita Karmokar, Kishor Kunal, Yaguang Li, Yishuang Lin, Mingjie Liu, Meghna Madhusudan, Parijat Mukherjee, David Z. Pan, Jitesh Poojary, Ramprasath S, Sachin S. Sapatnekar, Arvind K Sharma, Wenbin Xu, Soner Yaldiz, Keren Zhu

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Chapter

2 Scopus citations

Abstract

The performance of analog circuits is critically dependent on layout parasitics, but layout has traditionally been a manual and time-consuming task. Recent advances in ML have enabled new capabilities to facilitate fast automated placement and routing. This chapter presents an overview of these techniques, including geometric constraint generation and constrained placement and routing. A variety of ML techniques are used in various steps of analog placement and routing, including graph neural networks, random forest methods, support vector machines, graph attention networks, generative adversarial networks, reinforcement learning, and variational autoencoders. This chapter shows how these general ML algorithms are specifically customized to the requirements of optimized analog layout.

Original language	English (US)
Title of host publication	Machine Learning Applications in Electronic Design Automation
Publisher	Springer Singapore
Pages	505-544
Number of pages	40
ISBN (Electronic)	9783031130748
ISBN (Print)	9783031130731
DOIs	https://doi.org/10.1007/978-3-031-13074-8_17
State	Published - Jan 1 2023

Bibliographical note

Publisher Copyright:
© The Author(s), under exclusive license to Springer Nature Switzerland AG 2022.

Keywords

Analog layout
Analog routing
Annotation
Deep neural networks
Graph neural networks
Layout performance prediction
Symmetry

Publisher link

10.1007/978-3-031-13074-8_17

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Burns, S. M., Chen, H., Dhar, T., Harjani, R., Hu, J., Karmokar, N., Kunal, K., Li, Y., Lin, Y., Liu, M., Madhusudan, M., Mukherjee, P., Pan, D. Z., Poojary, J., S, R., Sapatnekar, S. S., Sharma, A. K., Xu, W., Yaldiz, S., & Zhu, K. (2023). Machine Learning for Analog Layout. In Machine Learning Applications in Electronic Design Automation (pp. 505-544). Springer Singapore. https://doi.org/10.1007/978-3-031-13074-8_17

Burns, SM, Chen, H, Dhar, T, Harjani, R, Hu, J, Karmokar, N, Kunal, K, Li, Y, Lin, Y, Liu, M, Madhusudan, M, Mukherjee, P, Pan, DZ, Poojary, J, S, R, Sapatnekar, SS, Sharma, AK, Xu, W, Yaldiz, S & Zhu, K 2023, Machine Learning for Analog Layout. in Machine Learning Applications in Electronic Design Automation. Springer Singapore, pp. 505-544. https://doi.org/10.1007/978-3-031-13074-8_17

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AU - Kunal, Kishor

AU - Li, Yaguang

AU - Lin, Yishuang

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AU - Madhusudan, Meghna

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AU - Pan, David Z.

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KW - Graph neural networks

KW - Layout performance prediction

KW - Symmetry

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Machine Learning for Analog Layout

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