Virtual integration techniques focus on building architectural models of systems that can be analyzed early in the design cycle to try to lower cost, reduce risk, and improve quality of complex embedded systems. Given appropriate architectural descriptions, assume/guarantee contracts, and compositional reasoning rules, these techniques can be used to prove important safety properties about the architecture prior to system construction. For these proofs to be meaningful, each leaf-level component contract must be realizable; i.e., it is possible to construct a component such that for any input allowed by the contract assumptions, there is some output value that the component can produce that satisfies the contract guarantees. We have recently proposed (in ) a contract-based realizability checking algorithm for assume/guarantee contracts over infinite theories supported by SMT solvers such as linear integer/real arithmetic and uninterpreted functions. In that work, we used an SMT solver and an algorithm similar to k-induction to establish the realizability of a contract, and justified our approach via a hand proof. Given the central importance of realizability to our virtual integration approach, we wanted additional confidence that our approach was sound. This paper describes a complete formalization of the approach in the Coq proof and specification language. During formalization, we found several small mistakes and missing assumptions in our reasoning. Although these did not compromise the correctness of the algorithm used in the checking tools, they point to the value of machine-checked formalization. In addition, we believe this is the first machine-checked formalization for a realizability algorithm.
|Original language||English (US)|
|Title of host publication||Verified Software|
|Subtitle of host publication||Theories, Tools, and Experiments - 7th International Conference, VSTTE 2015, Revised Selected Papers|
|Editors||Sanjit A. Seshia, Arie Gurfinkel|
|Number of pages||14|
|State||Published - Jan 1 2016|
|Event||7th International Conference on Verified Software: Theories, Tools, and Experiments, VSTTE 2015 - San Francisco, United States|
Duration: Jul 18 2015 → Jul 19 2015
|Name||Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|
|Conference||7th International Conference on Verified Software: Theories, Tools, and Experiments, VSTTE 2015|
|Period||7/18/15 → 7/19/15|
Bibliographical notePublisher Copyright:
© Springer International Publishing Switzerland 2016.
Copyright 2016 Elsevier B.V., All rights reserved.