Low switch count nine-level inverter topology for open-end induction motor drives

Abhijit Kshirsagar, R. Sudharshan Kaarthik, K. Gopakumar, Loganathan Umanand, Kaushik Rajashekara

Research output: Contribution to journalArticlepeer-review

14 Scopus citations

Abstract

This paper presents a nine-level inverter topology for an open-end induction motor drive requiring only eight switches per phase, using two three-level inverters with two isolated dc links in a 3:1 ratio. A space-vector-based formulation is used to determine pole voltages such that both inverters supply power to the load over the full modulation range, eliminating the possibility of dc bus overcharging. Proper selection of switching states ensures that all floating capacitor voltages are kept tightly balanced. A digital state machine is used to select sequences of switching states in order to eliminate deadtime-induced pole voltage transients, further improving the output-voltage quality. A level-shifted carrier-based pulse width modulation scheme is used. The steady-state and transient performance of this topology were verified and the experimental results are included.

Original languageEnglish (US)
Article number7582391
Pages (from-to)1009-1017
Number of pages9
JournalIEEE Transactions on Industrial Electronics
Volume64
Issue number2
DOIs
StatePublished - Feb 2017

Keywords

  • Flying capacitor (FC)
  • multilevel inverter
  • open-end induction motor drive
  • pulse width modulation (PWM)

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