Low power gate resizing of combinational circuits by buffer-redistribution

Keyphrases

• Low Power 100%
• Combinational Circuits 100%
• Gate Resizing 100%
• Power Gating 100%
• Gate Library 50%
• Polynomial Time 33%
• Power Reduction 33%
• Mapping Method 16%
• Minimum Area 16%
• Power Saving 16%
• Transformation Technique 16%
• Benchmark Circuits 16%
• Suboptimal Solutions 16%
• Exact Algorithm 16%
• Power Dissipated 16%
• Resizing 16%
• Power Discrete 16%

Computer Science

• Combinational Circuit 100%
• Polynomial Time 100%
• Critical Path 50%
• Benchmark Circuit 50%
• Exact Algorithm 50%

Engineering

• Polynomial Time 100%
• Combinatorial Circuits 100%
• Simulation Result 50%
• Exact Algorithm 50%
• Critical Path 50%