Low power circuit design based on heterojunction tunneling transistors (HETTs)

Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw

Research output: Chapter in Book/Report/Conference proceedingConference contribution

62 Scopus citations

Abstract

The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low supply voltages. This paper investigates extremely-low power circuits based on new Si/SiGe HEterojunction Tunneling Transistors (HETTs) that have subthreshold swing < 60 mV/decade. Device characteristics as determined through Technology Computer Aided Design (TCAD) tools are used to develop a Verilog-A device model to simulate and evaluate a range of HETT-based circuits. We show that a HETT-based ring oscillator (RO) shows a 9-19X reduction in dynamic power compared to a CMOS RO. We also explore two key differences between HETTs and traditional MOSFETs, namely asymmetric current flow and increased Miller capacitance, analyzing their effect on circuit behavior and proposing methods to address them. Finally, HETT characteristics have the most dramatic impact on SRAM operation and hence we propose a novel 7-transistor HETT-based SRAM cell topology to overcome, and take advantage of, the asymmetric current flow. This new HETT SRAM design achieves 7-37X reduction in leakage power compared to CMOS.

Original languageEnglish (US)
Title of host publicationISLPED'09 - Proceedings of the 2009 ACM/IEEE International Symposium on Low Power Electronics and Design
Pages219-224
Number of pages6
DOIs
StatePublished - Nov 24 2009
Event2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09 - San Fancisco, CA, United States
Duration: Aug 19 2009Aug 21 2009

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Other

Other2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09
CountryUnited States
CitySan Fancisco, CA
Period8/19/098/21/09

Keywords

  • Low power applications
  • SRAM design
  • Tunneling transistor

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    Kim, D., Lee, Y., Cai, J., Lauer, I., Chang, L., Koester, S. J., Sylvester, D., & Blaauw, D. (2009). Low power circuit design based on heterojunction tunneling transistors (HETTs). In ISLPED'09 - Proceedings of the 2009 ACM/IEEE International Symposium on Low Power Electronics and Design (pp. 219-224). [1594287] (Proceedings of the International Symposium on Low Power Electronics and Design). https://doi.org/10.1145/1594233.1594287