A novel compression technique for modulo-normalized state metrics in turbo decoder is presented. This technique performs the compression dynamically according to the range of state metrics. The framework of the compression circuit is given. BER performances for several turbo decoders are simulated. Implementation results show that the proposed technique needs only 25.2% logic gates and 77.5% memory bits of the existing method with same BER performance loss and much shorter critical path for eight state turbo codes. For four state turbo codes, 30.1% logic gates and 75% memory bits are required.
- Data compression
- State metrics classification: Integrated circuits
- Turbo decoder