Logic and memory design using spin-based circuits

Zhaoxin Liang, Meghna Mankalale, Brandon Del Bel, Sachin S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The design of logic and memory circuits in emerging spintronics technology offers fertile ground for new ideas and innovations. We first describe methods for optimizing spintronic logic circuits at the level of physical design, including systematic approaches for building standard cell libraries to enable the design of large circuits. Next, we examine issues in the design of spintronic memories and present methods that trade off volatility with error correction to create dense memory arrays.

Original languageEnglish (US)
Title of host publication2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages103-108
Number of pages6
ISBN (Electronic)9781467395694
DOIs
StatePublished - Mar 7 2016
Event21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016 - Macao, Macao
Duration: Jan 25 2016Jan 28 2016

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume25-28-January-2016

Other

Other21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
CountryMacao
CityMacao
Period1/25/161/28/16

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