Linear-Phase Lattice FIR Digital Filter Architectures Using Stochastic Logic

Research output: Contribution to journalArticle

Abstract

This paper presents novel architectures for linear-phase FIR digital filters using stochastic computing. Stochastic computing systems require fewer logic gates and are inherently fault-tolerant. Thus, these structures are well suited for nanoscale CMOS technologies. Compared to direct-form linear-phase FIR filters, linear-phase lattice filters require twice the number of multipliers but the same number of adders. The hardware complexities of stochastic implementations of linear-phase FIR filters for direct-form and lattice structures are comparable. This is because multipliers do not require any more area than adders. Two stochastic implementations of lattice FIR filters are proposed in this paper. Using speech signals from ICA ’99 Synthetic Benchmarks, it is shown that, for linear-phase FIR filters, the signal-to-error ratios of stochastic direct-form and stochastic lattice filters are abou the same.

Original languageEnglish (US)
Pages (from-to)791-803
Number of pages13
JournalJournal of Signal Processing Systems
Volume90
Issue number5
DOIs
StatePublished - May 1 2018

Fingerprint

FIR Filter
Digital Filter
FIR filters
Digital filters
Logic
Adders
Multiplier
Logic gates
Filter
Independent component analysis
Lattice Structure
Computing
Speech Signal
Linear Forms
Fault-tolerant
Architecture
Hardware
Benchmark

Keywords

  • FIR digital filter
  • Fault-tolerance
  • Hardware complexity
  • Lattice structure
  • Linear-phase FIR filters
  • Stochastic computing
  • Stochastic logic

Cite this

Linear-Phase Lattice FIR Digital Filter Architectures Using Stochastic Logic. / Liu, Yin; Parhi, Keshab K.

In: Journal of Signal Processing Systems, Vol. 90, No. 5, 01.05.2018, p. 791-803.

Research output: Contribution to journalArticle

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