Let us build system-friendly networks-build them hierarchically

William Tsun Yuk Hsu, Pen Chung Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations


Hierarchical systems address many hardware and software problems encountered by designers of large communication and computing systems; hence, interest in this field continues to grow. A diversity of hierarchical networks have been proposed in the literature. This paper introduces a framework for classifying hierarchical topologies. Using the framework, we survey existing topologies in an organized fashion and identify the major design choices. We show how new hierarchical networks can be generated by varying architectural parameters in the framework. The performance evaluation of the numerous topologies remains a non-trivial task; we describe some preliminary efforts in that direction.

Original languageEnglish (US)
Title of host publicationProceedings of the 1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996
EditorsH.J. Siegel
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages10
ISBN (Electronic)081867623X
StatePublished - 1996
Event1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996 - Ithaca, United States
Duration: Aug 12 1996Aug 12 1996

Publication series

NameProceedings of the International Conference on Parallel Processing Workshops
ISSN (Print)1530-2016


Other1996 ICPP Workshop on Challenges for Parallel Processing, ICPPW 1996
Country/TerritoryUnited States

Bibliographical note

Funding Information:
This work was supported in part by the National Science Foundation under Grants No. US NSF MIP-8410110 and US NSF (hy89-20891, the US Department of Energy under Grant No. US DOE DE-FG02-85ER25001, the NASA Ames Research Center under Grant No. NASA NCC 2-559, Sun Microsystem, and an SFSU Faculty Research Affirmative Action Grant.

Publisher Copyright:
© 1996 IEEE.


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