Abstract
This paper examines the effectiveness of larger-than-V<inf>dd</inf> forward body bias (FBB) in nanoscale bulk CMOS circuits where V<inf>dd</inf> is expected to scale below 0.5V. Equal-to and larger-than V<inf>dd</inf> FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.
Original language | English (US) |
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Title of host publication | Proceedings of the International Symposium on Low Power Electronics and Design |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 8-13 |
Number of pages | 6 |
Volume | 2004-January |
Edition | January |
ISBN (Print) | 1581139292 |
State | Published - 2004 |
Event | 2004 International Symposium on Low Power Electronics and Design, ISLPED 2004 - Newport Beach, United States Duration: Aug 9 2004 → Aug 11 2004 |
Other
Other | 2004 International Symposium on Low Power Electronics and Design, ISLPED 2004 |
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Country | United States |
City | Newport Beach |
Period | 8/9/04 → 8/11/04 |
Keywords
- Forward Body Bias
- Junction Leakage
- Process Variations
- Sub-threshold Leakage