Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS

Hari Ananthan; Chris H. Kim; Kaushik Roy

Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS

Hari Ananthan, Chris H. Kim, Kaushik Roy

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

12 Scopus citations

Abstract

This paper examines the effectiveness of larger-than-V<inf>dd</inf> forward body bias (FBB) in nanoscale bulk CMOS circuits where V<inf>dd</inf> is expected to scale below 0.5V. Equal-to and larger-than V<inf>dd</inf> FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.

Original language	English (US)
Title of host publication	Proceedings of the International Symposium on Low Power Electronics and Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	8-13
Number of pages	6
Volume	2004-January
Edition	January
ISBN (Print)	1581139292
State	Published - 2004
Event	2004 International Symposium on Low Power Electronics and Design, ISLPED 2004 - Newport Beach, United States Duration: Aug 9 2004 → Aug 11 2004

Other

Other	2004 International Symposium on Low Power Electronics and Design, ISLPED 2004
Country	United States
City	Newport Beach
Period	8/9/04 → 8/11/04

Keywords

Forward Body Bias
Junction Leakage
Process Variations
Sub-threshold Leakage

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Cite this

Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS. / Ananthan, Hari; Kim, Chris H.; Roy, Kaushik.

Proceedings of the International Symposium on Low Power Electronics and Design. Vol. 2004-January January. ed. Institute of Electrical and Electronics Engineers Inc., 2004. p. 8-13 1349299.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ananthan, H, Kim, CH & Roy, K 2004, Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS. in Proceedings of the International Symposium on Low Power Electronics and Design. January edn, vol. 2004-January, 1349299, Institute of Electrical and Electronics Engineers Inc., pp. 8-13, 2004 International Symposium on Low Power Electronics and Design, ISLPED 2004, Newport Beach, United States, 8/9/04.

@inproceedings{45a35b00051541269c5c13f8c9723616,

title = "Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS",

abstract = "This paper examines the effectiveness of larger-than-Vdd forward body bias (FBB) in nanoscale bulk CMOS circuits where Vdd is expected to scale below 0.5V. Equal-to and larger-than Vdd FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.",

keywords = "Forward Body Bias, Junction Leakage, Process Variations, Sub-threshold Leakage",

author = "Hari Ananthan and Kim, {Chris H.} and Kaushik Roy",

year = "2004",

language = "English (US)",

isbn = "1581139292",

volume = "2004-January",

pages = "8--13",

booktitle = "Proceedings of the International Symposium on Low Power Electronics and Design",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

edition = "January",

note = "2004 International Symposium on Low Power Electronics and Design, ISLPED 2004 ; Conference date: 09-08-2004 Through 11-08-2004",

}

TY - GEN

T1 - Larger-than-Vdd Forward Body Bias in Sub-0.5V Nanoscale CMOS

AU - Ananthan, Hari

AU - Kim, Chris H.

AU - Roy, Kaushik

PY - 2004

Y1 - 2004

N2 - This paper examines the effectiveness of larger-than-Vdd forward body bias (FBB) in nanoscale bulk CMOS circuits where Vdd is expected to scale below 0.5V. Equal-to and larger-than Vdd FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.

AB - This paper examines the effectiveness of larger-than-Vdd forward body bias (FBB) in nanoscale bulk CMOS circuits where Vdd is expected to scale below 0.5V. Equal-to and larger-than Vdd FBB schemes offer unique advantages over conventional FBB such as simple design overhead and reverse body bias capability respectively. Compared to zero body bias, they improve process-variation immunity and achieve 71% and 78% standby leakage savings at iso performance and iso active power at room temperature. We also suggest a novel temperature-adaptive body bias scheme to control active leakage and achieve 22% and 40% active power savings at higher temperatures.

KW - Forward Body Bias

KW - Junction Leakage

KW - Process Variations

KW - Sub-threshold Leakage

UR - http://www.scopus.com/inward/record.url?scp=84932130886&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84932130886&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:16244401645

SN - 1581139292

VL - 2004-January

SP - 8

EP - 13

BT - Proceedings of the International Symposium on Low Power Electronics and Design

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2004 International Symposium on Low Power Electronics and Design, ISLPED 2004

Y2 - 9 August 2004 through 11 August 2004

ER -