@inproceedings{df7b77b5e61d42cf9c5af63c7d93ab76,
title = "Issues and support for dynamic register allocation",
abstract = "Post-link and dynamic optimizations have become important to achieve program performance. A major challenge in post-link and dynamic optimizations is the acquisition of registers for inserting optimization code in the main program. It is difficult to achieve both correctness and transparency when software-only schemes for acquiring registers are used, as described in [1]. We propose an architecture feature that builds upon existing hardware for stacked register allocation on the Itanium processor. The hardware impact of this feature is minimal, while simultaneously allowing post-link and dynamic optimization systems to obtain registers for optimization in a {"}safe{"} manner, thus preserving the transparency and improving the performance of these systems.",
author = "Abhinav Das and Rao Fu and Antonia Zhai and Hsu, {Wei Chung}",
year = "2006",
doi = "10.1007/11859802_29",
language = "English (US)",
isbn = "3540400567",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "351--358",
booktitle = "Advances in Computer Systems Architecture - 11th Asia-Pacific Conference, ACSAC 2006, Proceedings",
note = "11th Asia-Pacific Conference on Advances in Computer Systems Architecture, ACSAC 2006 ; Conference date: 06-09-2006 Through 08-09-2006",
}