INVITED: ALIGN - Open-source analog layout automation from the ground up

Kishor Kunal; Meghna Madhusudan; Arvind K. Sharma; Wenbin Xu; Steven M. Burns; Ramesh Harjani; Jiang Hu; Desmond A. Kirkpatrick; Sachin S Sapatnekar

doi:10.1145/3316781.3323471

INVITED: ALIGN - Open-source analog layout automation from the ground up

Kishor Kunal
, Meghna Madhusudan
, Arvind K. Sharma
, Wenbin Xu
, Steven M. Burns
, Ramesh Harjani
, Jiang Hu
, Desmond A. Kirkpatrick
, Sachin S Sapatnekar

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

63 Scopus citations

Abstract

This paper presents analog layout automation efforts under the ALIGN ("Analog Layout, Intelligently Generated from Netlists") project for fast layout generation using a modular approach based on a mix of algorithmic and machine learning-based tools. The road to rapid turnaround is based on an approach that detects structure and hierarchy in the input netlist and uses a grid based philosophy for layout. The paper provides a view of the current status of the project, challenges in developing open-source code with an academic/ industry team, and nuts-and-bolts issues such as working with abstracted PDKs, navigating the "wall" between secured IP and open-source software, and securing access to example designs.

Original language	English (US)
Title of host publication	Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781450367257
DOIs	https://doi.org/10.1145/3316781.3323471
State	Published - Jun 2 2019
Event	56th Annual Design Automation Conference, DAC 2019 - Las Vegas, United States Duration: Jun 2 2019 → Jun 6 2019

Publication series

Name	Proceedings - Design Automation Conference
ISSN (Print)	0738-100X

Conference

Conference	56th Annual Design Automation Conference, DAC 2019
Country/Territory	United States
City	Las Vegas
Period	6/2/19 → 6/6/19

Bibliographical note

Publisher Copyright:
© 2019 Copyright held by the owner/author(s). Publication rights licensed to ACM.

Keywords

Analog circuits
Hierarchy
Machine learning
Physical design

Publisher link

10.1145/3316781.3323471

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Kunal, K., Madhusudan, M., Sharma, A. K., Xu, W., Burns, S. M., Harjani, R., Hu, J., Kirkpatrick, D. A., & Sapatnekar, S. S. (2019). INVITED: ALIGN - Open-source analog layout automation from the ground up. In Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019 Article a77 (Proceedings - Design Automation Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3316781.3323471

INVITED: ALIGN - Open-source analog layout automation from the ground up. / Kunal, Kishor; Madhusudan, Meghna; Sharma, Arvind K. et al.
Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. a77 (Proceedings - Design Automation Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kunal, K, Madhusudan, M, Sharma, AK, Xu, W, Burns, SM, Harjani, R, Hu, J, Kirkpatrick, DA & Sapatnekar, SS 2019, INVITED: ALIGN - Open-source analog layout automation from the ground up. in Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019., a77, Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 56th Annual Design Automation Conference, DAC 2019, Las Vegas, United States, 6/2/19. https://doi.org/10.1145/3316781.3323471

@inproceedings{e8049dbb044442f8ba08b9d329564c41,

title = "INVITED: ALIGN - Open-source analog layout automation from the ground up",

abstract = "This paper presents analog layout automation efforts under the ALIGN ({"}Analog Layout, Intelligently Generated from Netlists{"}) project for fast layout generation using a modular approach based on a mix of algorithmic and machine learning-based tools. The road to rapid turnaround is based on an approach that detects structure and hierarchy in the input netlist and uses a grid based philosophy for layout. The paper provides a view of the current status of the project, challenges in developing open-source code with an academic/ industry team, and nuts-and-bolts issues such as working with abstracted PDKs, navigating the {"}wall{"} between secured IP and open-source software, and securing access to example designs.",

keywords = "Analog circuits, Hierarchy, Machine learning, Physical design",

author = "Kishor Kunal and Meghna Madhusudan and Sharma, \{Arvind K.\} and Wenbin Xu and Burns, \{Steven M.\} and Ramesh Harjani and Jiang Hu and Kirkpatrick, \{Desmond A.\} and Sapatnekar, \{Sachin S\}",

note = "Publisher Copyright: {\textcopyright} 2019 Copyright held by the owner/author(s). Publication rights licensed to ACM.; 56th Annual Design Automation Conference, DAC 2019 ; Conference date: 02-06-2019 Through 06-06-2019",

year = "2019",

month = jun,

day = "2",

doi = "10.1145/3316781.3323471",

language = "English (US)",

series = "Proceedings - Design Automation Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019",

}

TY - GEN

T1 - INVITED

T2 - 56th Annual Design Automation Conference, DAC 2019

AU - Kunal, Kishor

AU - Madhusudan, Meghna

AU - Sharma, Arvind K.

AU - Xu, Wenbin

AU - Burns, Steven M.

AU - Harjani, Ramesh

AU - Hu, Jiang

AU - Kirkpatrick, Desmond A.

AU - Sapatnekar, Sachin S

PY - 2019/6/2

Y1 - 2019/6/2

N2 - This paper presents analog layout automation efforts under the ALIGN ("Analog Layout, Intelligently Generated from Netlists") project for fast layout generation using a modular approach based on a mix of algorithmic and machine learning-based tools. The road to rapid turnaround is based on an approach that detects structure and hierarchy in the input netlist and uses a grid based philosophy for layout. The paper provides a view of the current status of the project, challenges in developing open-source code with an academic/ industry team, and nuts-and-bolts issues such as working with abstracted PDKs, navigating the "wall" between secured IP and open-source software, and securing access to example designs.

AB - This paper presents analog layout automation efforts under the ALIGN ("Analog Layout, Intelligently Generated from Netlists") project for fast layout generation using a modular approach based on a mix of algorithmic and machine learning-based tools. The road to rapid turnaround is based on an approach that detects structure and hierarchy in the input netlist and uses a grid based philosophy for layout. The paper provides a view of the current status of the project, challenges in developing open-source code with an academic/ industry team, and nuts-and-bolts issues such as working with abstracted PDKs, navigating the "wall" between secured IP and open-source software, and securing access to example designs.

KW - Analog circuits

KW - Hierarchy

KW - Machine learning

KW - Physical design

UR - https://www.scopus.com/pages/publications/85067807209

UR - https://www.scopus.com/pages/publications/85067807209#tab=citedBy

U2 - 10.1145/3316781.3323471

DO - 10.1145/3316781.3323471

M3 - Conference contribution

AN - SCOPUS:85067807209

T3 - Proceedings - Design Automation Conference

BT - Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 2 June 2019 through 6 June 2019

ER -

INVITED: ALIGN - Open-source analog layout automation from the ground up

Abstract

Publication series

Conference

Bibliographical note

Keywords

Publisher link

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