Abstract
This paper presents analog layout automation efforts under the ALIGN ("Analog Layout, Intelligently Generated from Netlists") project for fast layout generation using a modular approach based on a mix of algorithmic and machine learning-based tools. The road to rapid turnaround is based on an approach that detects structure and hierarchy in the input netlist and uses a grid based philosophy for layout. The paper provides a view of the current status of the project, challenges in developing open-source code with an academic/ industry team, and nuts-and-bolts issues such as working with abstracted PDKs, navigating the "wall" between secured IP and open-source software, and securing access to example designs.
Original language | English (US) |
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Title of host publication | Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781450367257 |
DOIs | |
State | Published - Jun 2 2019 |
Event | 56th Annual Design Automation Conference, DAC 2019 - Las Vegas, United States Duration: Jun 2 2019 → Jun 6 2019 |
Publication series
Name | Proceedings - Design Automation Conference |
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ISSN (Print) | 0738-100X |
Conference
Conference | 56th Annual Design Automation Conference, DAC 2019 |
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Country/Territory | United States |
City | Las Vegas |
Period | 6/2/19 → 6/6/19 |
Bibliographical note
Publisher Copyright:© 2019 Copyright held by the owner/author(s). Publication rights licensed to ACM.
Keywords
- Analog circuits
- Hierarchy
- Machine learning
- Physical design