Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process

Nakul Pande, Gyusung Park, Chris H. Kim, Srikanth Krishnan, Vijay Reddy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work presents measured test-data corresponding to a comprehensive reliability characterization of diode-connected MOS transistors. An array-based test structure, with the specific aim of quantifying the impact of feedback on the aging dynamics for the circuit configuration of interest was designed and implemented in a 65nm Low-Power (LP) process. Through detailed measurement data obtained using the test-vehicle we, (1) characterize the impact of feedback on the aging rate and compare it to the no-feedback case (2) evaluate the efficacy of iterative simulations for lifetime projection in such scenarios with the method based on the universality of hot carrier degradation extended to the case featuring feedback.

Original languageEnglish (US)
Title of host publication2019 IEEE International Reliability Physics Symposium, IRPS 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538695043
DOIs
StatePublished - May 22 2019
Event2019 IEEE International Reliability Physics Symposium, IRPS 2019 - Monterey, United States
Duration: Mar 31 2019Apr 4 2019

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2019-March
ISSN (Print)1541-7026

Conference

Conference2019 IEEE International Reliability Physics Symposium, IRPS 2019
Country/TerritoryUnited States
CityMonterey
Period3/31/194/4/19

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by in part by the Semiconductor Research Corporation (SRC) and the Texas Analog Center of Excellence (TxACE).

Publisher Copyright:
© 2019 IEEE.

Keywords

  • Analog / Mixed-Signal Aging
  • Bond-dispersion model
  • Circuit aging
  • Circuit reliability
  • Hot carrier injection (HCI)
  • Lateral scaling
  • Universality of degradation
  • Voltage acceleration model

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