Integrated MoS2 n-MOSFETs and black phosphorus p-MOSFETs with HfO2 dielectrics and local backgate electrodes

Yang Su, Nazila Haratipour, Matthew C. Robbins, Chaitanya Kshirsagar, Steven J. Koester

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations


Two-dimensional (2D) semiconductors are of interest for numerous device applications, as they can provide excellent scalability and ease of integration onto arbitrary substrates and high performance transistors have been demonstrated with various 2D materials [1-2]. In particular, MoS2 and black phosphorus (BP) are both promising 2D materials for use in metal-oxide-semiconductor field-effect transistors (MOSFETs). MoS2 is particularly useful for n-MOSFETs [3], but p-type MoS2 devices are difficult to fabricate. On the other hand, recent reports of BP p-MOSFETs have shown excellent performance [4]. However, the only reports of logic circuits based upon material combination have utilized devices with Al2O3 dielectrics [5]. In this paper, we report the co-integration of black phosphorus n-MOSFETs with BP p-MOSFETs using local backgates with high-K HfO2 dielectrics and demonstrate their operation both before and after passivation to create air-stable devices. The devices show high transconductance and excellent matching between p-and n-FET characteristics, and these results pave the way for creating high-performance logic circuits using 2D semiconducting materials.

Original languageEnglish (US)
Title of host publication73rd Annual Device Research Conference, DRC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages2
ISBN (Electronic)9781467381345
StatePublished - Aug 3 2015
Event73rd Annual Device Research Conference, DRC 2015 - Columbus, United States
Duration: Jun 21 2015Jun 24 2015

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770


Conference73rd Annual Device Research Conference, DRC 2015
Country/TerritoryUnited States

Bibliographical note

Funding Information:
This work was partially supported by the Defense Threat Reduction Agency, Basic Research Award No. HDTRAI-14-1-0042, and the National Science Foundation (NSF) through the University of Minnesota MRSEC under Award No. DMR-1420013.

Publisher Copyright:
© 2015 IEEE.


  • Facsimile
  • Gold
  • Logic gates
  • MOSFET circuits
  • Silicon

How much support was provided by MRSEC?

  • Partial


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