TY - GEN
T1 - Integrated amplifier architectures for efficient coupling to the nervous system
AU - Denison, Timothy
AU - Molnar, Gregory
AU - Harrison, Reid R.
N1 - Copyright:
Copyright 2021 Elsevier B.V., All rights reserved.
PY - 2009
Y1 - 2009
N2 - Monitoring the electrical activity of multiple neurons in the brain could enable a wide range of scientific and clinical endeavors. An enabling technology for neural monitoring is the interface amplifier. Current amplifier research is focused on two paradigms of chronically sensing neural activity: one is the measurement of 'spike' signals from individual neurons to provide high-fidelity control signals for neuroprosthesis, while the other is the measurement of bandpower fluctuations from cell ensembles that convey general information like the intention to move. In both measurement techniques, efforts to merge neural recording arrays with integrated electronics have revealed significant circuit design challenges. For example, weak neural signals, on the order of tens of microvolts rms, must be amplified prior to analysis and are often co-located with frequencies dominated by 1/f and popcorn noise in CMOS technologies. To insure the highest fidelity measurement, micropower chopper stabilization is often required to provide immunity from this excess noise. Another difficulty is that strict power constraints place severe limitations on the signal processing, algorithms and telemetry capabilities available in a practical system. These constraints motivate the design of the interface amplifier as part of a total system-level solution. In particular, the system solutions we pursued are driven by the key neural signal of interest, and we use the characteristics of the neural code guide the partitioning of the signal chain. To illustrate the generality of this design philosophy, we discuss state-of-the-art design examples from a spike-based, single-cell system, and a field potential, ensemble neuronal measurement system, both intended for practical and robust neuroprosthesis applications.
AB - Monitoring the electrical activity of multiple neurons in the brain could enable a wide range of scientific and clinical endeavors. An enabling technology for neural monitoring is the interface amplifier. Current amplifier research is focused on two paradigms of chronically sensing neural activity: one is the measurement of 'spike' signals from individual neurons to provide high-fidelity control signals for neuroprosthesis, while the other is the measurement of bandpower fluctuations from cell ensembles that convey general information like the intention to move. In both measurement techniques, efforts to merge neural recording arrays with integrated electronics have revealed significant circuit design challenges. For example, weak neural signals, on the order of tens of microvolts rms, must be amplified prior to analysis and are often co-located with frequencies dominated by 1/f and popcorn noise in CMOS technologies. To insure the highest fidelity measurement, micropower chopper stabilization is often required to provide immunity from this excess noise. Another difficulty is that strict power constraints place severe limitations on the signal processing, algorithms and telemetry capabilities available in a practical system. These constraints motivate the design of the interface amplifier as part of a total system-level solution. In particular, the system solutions we pursued are driven by the key neural signal of interest, and we use the characteristics of the neural code guide the partitioning of the signal chain. To illustrate the generality of this design philosophy, we discuss state-of-the-art design examples from a spike-based, single-cell system, and a field potential, ensemble neuronal measurement system, both intended for practical and robust neuroprosthesis applications.
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U2 - 10.1007/978-1-4020-8944-2_10
DO - 10.1007/978-1-4020-8944-2_10
M3 - Conference contribution
AN - SCOPUS:84881449902
SN - 9781402089435
T3 - Analog Circuit Design - High-Speed Clock and Data Recovery, High-Performance Amplifiers, Power Management
SP - 167
EP - 191
BT - Analog Circuit Design - High-Speed Clock and Data Recovery, High-Performance Amplifiers, Power Management
PB - Springer London
T2 - 17th Workshop on Advances in Analog Circuit Design, AACD 2008
Y2 - 8 April 2008 through 10 April 2008
ER -