This paper presents a new solution for combining technology mapping with placement, coupling the two into one phase. The original aspects of our work are the use of libraryless mapping and a state space search mechanism that is used to find the best solution. Several heuristics are presented for speeding up the search. Comparisons with a more conventional approach show that these strategies provide improvements of about 20%, with reasonable CPU times, on benchmark circuits.
|Original language||English (US)|
|Number of pages||4|
|Journal||IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers|
|State||Published - Dec 1 1999|
|Event||Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design (ICCAD-99) - San Jose, CA, USA|
Duration: Nov 7 1999 → Nov 11 1999