Incorporating the Role of Stress on Electromigration in Power Grids with Via Arrays

Vivek Mishra, Palkesh Jain, Sravan K. Marella, Sachin S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

Modern power grids use via arrays to connect wires across metal layers. These arrays are susceptible to electromigration (EM), which creates voids under the vias, potentially causing circuit malfunction. We combine the effect of via redundancy with models that characterize the effect of via array geometry on thermomechanical stress, and determine how the choice of via arrays can affect EM-induced failure in a power grid based on IR-drop threshold based failure criteria.

Original languageEnglish (US)
Title of host publicationProceedings of the 54th Annual Design Automation Conference 2017, DAC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450349277
DOIs
StatePublished - Jun 18 2017
Event54th Annual Design Automation Conference, DAC 2017 - Austin, United States
Duration: Jun 18 2017Jun 22 2017

Publication series

NameProceedings - Design Automation Conference
VolumePart 128280
ISSN (Print)0738-100X

Other

Other54th Annual Design Automation Conference, DAC 2017
Country/TerritoryUnited States
CityAustin
Period6/18/176/22/17

Bibliographical note

Funding Information:
This work was partially supported by the NSF awards CCF-1421606, CCF-1162267, and the Doctoral Dissertation Fellowship, University of Minnesota.

Publisher Copyright:
© 2017 ACM.

Keywords

  • Electromigration
  • IR drop
  • power grid
  • redundancy
  • thermomechanical stress
  • via array

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