Improved Bipolar Transistor Performance in a VLSI CMOS Process

Bipolar n-p-n transistors have been successfully fabricated on a high-performance n-well VLSI CMOS process incorporating an additional mask and implant step. A double active-base implant was utilized to control the base surface concentration and the transistor characteristics separately. High forward common-emitter current gain and collector–emitter breakdown voltage can be achieved by this process. n-p-n transistors with βf = 100, BVCE0 = 9.0 V, and BVCB0 = 23 V can be easily fabricated on this scaled VLSI CMOS process.