Impact of wiring constraints on hierarchical network performance

William Tsun yuk Hsu, Pen Chung Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

A unified approach, incorporating architectural and packaging issues, is necessary in the design of high performance computer networks. Clustering enables us to exploit the physical hierarchy imposed by packaging. In [HsYe91], we examined the clustering of hypercube networks within the context of wiring constraints. Here, we extend our earlier work to compare the performance of hypercubes and meshes. We consider two cost constraints, bisection width and package pinout, and examine flat and clustered meshes and hypercubes. We find that the relative performance of networks depends on the chosen wiring constraint, as well as system configuration and message granularity.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Parallel Processing
PublisherPubl by IEEE
Pages580-588
Number of pages9
ISBN (Print)0818626720
StatePublished - Dec 1 1992
EventProceedings of the 6th International Parallel Processing Symposium - Beverly Hills, CA, USA
Duration: Mar 23 1992Mar 26 1992

Publication series

NameProceedings of the International Conference on Parallel Processing
ISSN (Print)0190-3918

Other

OtherProceedings of the 6th International Parallel Processing Symposium
CityBeverly Hills, CA, USA
Period3/23/923/26/92

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    Hsu, W. T. Y., & Yew, P. C. (1992). Impact of wiring constraints on hierarchical network performance. In Proceedings of the International Conference on Parallel Processing (pp. 580-588). (Proceedings of the International Conference on Parallel Processing). Publ by IEEE.