High-speed Huffman decoder architectures

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Scopus citations

Abstract

The author presents pipelined and parallel architectures for high-speed implementation of Huffman decoders using look-ahead computation techniques. Huffman decoders are used in high-definition television, video, and other data compression systems. The achievable speed in these decoders is inherently limited due to their sequential nature of computation. The unequal code word length of the Huffman code words makes it difficult to apply look-ahead. This problem is overcome by representing Huffman decoders as finite state machines which can exploit look-ahead. The proposed approach is useful for high-speed Huffman decoder implementations where the number of symbols of the decoder is low.

Original languageEnglish (US)
Title of host publicationConference Record - Asilomar Conference on Circuits, Systems & Computers
PublisherPubl by Maple Press, Inc
Pages64-68
Number of pages5
ISBN (Print)0818624701
StatePublished - Dec 1 1991
Event25th Asilomar Conference on Signals, Systems & Computers Part 1 (of 2) - Pacific Grove, CA, USA
Duration: Nov 4 1991Nov 6 1991

Publication series

NameConference Record - Asilomar Conference on Circuits, Systems & Computers
Volume1
ISSN (Print)0736-5861

Other

Other25th Asilomar Conference on Signals, Systems & Computers Part 1 (of 2)
CityPacific Grove, CA, USA
Period11/4/9111/6/91

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