High-speed arithmetic coder/decoder architectures

Gireesh Shrimali, Keshab K. Parhi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

The state of art in data compression is arithmetic coding, not the better known Huffman method. To a unique data string, arithmetic coding technique assigns a unique fractional value on the number line between 0 and 1. The speed of this algorithm is limited because of its inherent recursive nature. In this paper we present the design of fast decoders using a novel interval tree search method. The decoder can be modeled as a FSM (finite state machine), enabling the application of look-ahead technique to achieve higher speeds. Look-ahead approach leads to slight degradation in performance (in terms of the adder/subtractor delay in the coder/decoder due to increased word lengths). We improve the performance of the decoder by using redundant arithmetic. The tree search method combined with redundant arithmetic and look-ahead leads to desired speed-ups without any degradation in performance.

Original languageEnglish (US)
Title of host publicationPlenary, Special, Audio, Underwater Acoustics, VLSI, Neural Networks
PublisherPubl by IEEE
PagesI-361-I-364
ISBN (Print)0780309464
StatePublished - Jan 1 1993
Event1993 IEEE International Conference on Acoustics, Speech and Signal Processing - Minneapolis, MN, USA
Duration: Apr 27 1993Apr 30 1993

Publication series

NameProceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing
Volume1
ISSN (Print)0736-7791

Other

Other1993 IEEE International Conference on Acoustics, Speech and Signal Processing
CityMinneapolis, MN, USA
Period4/27/934/30/93

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    Shrimali, G., & Parhi, K. K. (1993). High-speed arithmetic coder/decoder architectures. In Plenary, Special, Audio, Underwater Acoustics, VLSI, Neural Networks (pp. I-361-I-364). (Proceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing; Vol. 1). Publ by IEEE.