High-speed architecture design of Tomlinson-Harashima precoders

Yongru Gu, Keshab K. Parhi

Research output: Contribution to journalArticlepeer-review

17 Scopus citations


Like decision feedback equalizers (DFEs), Tomlinson-Harashima precoders (TH precoders) contain nonlinear feedback loops, which limit their use for high-speed applications. Unlike in DFEs where the output levels of the nonlinear devices are finite, in TH precoders, theoretically, the output levels of the modulo devices are infinite. Thus, it is difficult to apply look-ahead and pre-computation techniques to pipeline TH precoders, which were successfully applied to pipeline infinite-impulse response (IIR) filters and DFEs in the past. In this paper, three approaches are proposed to design high-speed TH precoders. In the first approach, the traditional block processing technique for DFEs is generalized to the design of high-speed TH precoders. In the second approach, based on the equivalent form of a TH precoder where the precoder can be viewed as an IIR filter with an input equal to the sum of the original input to the TH precoder and a finite-level compensation signal, two high-speed pipelined designs are developed. In the third approach, parallel processing techniques for fast IIR filters are generalized to the design of parallel TH precoders.

Original languageEnglish (US)
Pages (from-to)1929-1937
Number of pages9
JournalIEEE Transactions on Circuits and Systems I: Regular Papers
Issue number9
StatePublished - Sep 2007

Bibliographical note

Funding Information:
Manuscript received February 16, 2006. This work was supported in part by the National Science Foundation under Grant Number CCF-0429979. This paper was recommended by Associate Editor M. Stan. Y. Gu is with Newport Media, Inc., Lake Forest, CA 92630 USA (e-mail: yongru.gu@gmail.com). K. K. Parhi is with the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455 USA (e-mail: parhi@umn. edu). Digital Object Identifier 10.1109/TCSI.2007.904688


  • High speed
  • Parallel processing
  • Pipelining
  • Tomlinson-Harashima precoders (TH precoders)
  • VLSI architectures


Dive into the research topics of 'High-speed architecture design of Tomlinson-Harashima precoders'. Together they form a unique fingerprint.

Cite this