High permittivity oxide gate stacks on silicon incorporating UHV silicon nitride interfacial layers

Mark A. Shriver, Ann M. Gabrys, T. K. Higman, S. A. Campbell

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Current high permittivity material deposition techniques produce a low permittivity oxide interracial layer consequently increasing the equivalent oxide thickness. This interfacial oxide layer can be prevented by initially growing a thin nitride layer to act as a diffusion barrier. The interracial nitride layer must also have low interface state densities comparable to state-of-the-art SiO2 insulators in order to be suitable for MOSFETs. The nitride layer used in this study was formed by thermal nitridation in a UHV system, with the subsequent high permittivity deposition done in an adjoining system. After forming capacitors from these films, capacitance vs. voltage (C-V) techniques were used to determine the interface state density and equivalent oxide thickness of the films. Gate stack films were produced on Si(100) and Si(111) and the results are compared. Gate stacks on Si(100) show a slight increase in stretchout in the high frequency C-V curves for both n-type and p-type samples. Initial data suggests that Si(111) has a lower interface state density than the Si(100) gate stacks. This may be attributed to the Si3N4 layer on Si(111) being epitaxial nitride.

Original languageEnglish (US)
Title of host publicationMaterials Research Society Symposium - Proceedings
EditorsS A Campbell, L A Clevenger, P B Griffin, C C Hobbs
Volume670
StatePublished - 2001
EventGate Stack and Silicide Issues in Silicon Processing II - San Francisco, CA, United States
Duration: Apr 17 2001Apr 19 2001

Other

OtherGate Stack and Silicide Issues in Silicon Processing II
CountryUnited States
CitySan Francisco, CA
Period4/17/014/19/01

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