High performance, high throughput turbo/SOVA decoder design

Zhongfeng Wang, Keshab K. Parhi

Research output: Contribution to journalArticlepeer-review

38 Scopus citations


In this paper, two efficient approaches are proposed to improve the performance of soft-output Viterbi algorithm (SOVA)-based turbo decoders. In the first approach, an easily obtainable variable and a simple mapping function are used to compute a target scaling factor to normalize the extrinsic information output from turbo decoders. An extra coding gain of 0.5 dB can be obtained with additive white Gaussian noise channels. This approach does not introduce extra latency and the hardware overhead is negligible. In the second approach, an adaptive upper bound based on the channel reliability is set for computing the metric difference between competing paths. By combining the two approaches, we show that the new SOVA-based turbo decoders can approach maximum a posteriori probability (MAP)-based turbo decoders within 0.1 dB when the target bit-error rate (BER) is moderately low (e.g., BER < 10-4 for 1/2 rate codes). Following this, practical implementation issues are discussed and finite precision simulation results are provided. An area-efficient parallel decoding architecture is presented in this paper as an effective approach to design high-throughput turbo/SOVA decoders. With the efficient parallel architecture, multiple times throughput of a conventional serial decoder can be obtained by increasing the overall hardware by a small percentage. To resolve the problem of multiple memory accesses per cycle for the efficient parallel architecture, a novel two-level hierarchical interleaver architecture is proposed. Simulation results show that the proposed interleaver architecture performs as well as random interleavers, while requiring much less storage of random patterns.

Original languageEnglish (US)
Pages (from-to)570-579
Number of pages10
JournalIEEE Transactions on Communications
Issue number4
StatePublished - Apr 2003

Bibliographical note

Funding Information:
Paper approved by C. Schlegel, the Editor for Coding Theory and Techniques of the IEEE Communications Society. Manuscript received March 11, 2000; revised September 30, 2002. This work was supported by the Defense Advanced Research Project Agency under Contract DA/DABT63-96-C-0050. This paper was presented in part at IEEE ISCAS 2000, Geneva, Switzerland.


  • High performance
  • High throughput
  • Low power
  • Parallel decoding
  • Soft-output Viterbi algorithm (SOVA) decoder
  • Turbo codes
  • Turbo interleaver


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