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High-performance digit-serial complex multiplier
Yun Nan Chang
,
Keshab K. Parhi
Electrical and Computer Engineering
Research output
:
Contribution to journal
›
Article
›
peer-review
4
Scopus citations
Overview
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Keyphrases
High Performance
100%
Digit-serial
100%
Complex multiplier
100%
Representation Scheme
66%
Multiplier Design
66%
Proposed Design
33%
Hardware Complexity
33%
Wiring
33%
Design Methodology
33%
Processing Speed
33%
VLSI Implementation
33%
Complex numbers
33%
Radix
33%
Low Power Dissipation
33%
Carry-save
33%
Complex number System
33%
Glitches
33%
Number Representation
33%
Hardware Computing
33%
Grain Level
33%
Throughput Rate
33%
Engineering
Energy Dissipation
100%
Hardware Complexity
100%
Fine Grain
100%
Grain Level
100%
Number System
100%
Computer Science
Number System
100%
Processing Speed
100%
Computer Hardware
100%
Energy Dissipation
100%