A common device geometry for measuring the electrical characteristics of organic semiconductors is the thin-film organic field-effect transistor (OTFT). Mostly for reasons of cost, convenience, and availability, this usually involves depositing the organic material on a prefabricated gate structure such as SiSi O2, the surface chemistry of which is often modified with self-assembled monolayers. The interactions between these surfaces and the deposited organic can have a profound effect on thin-film growth and the resulting electrical characteristics since most of the charge transport in these structures occurs near the organic-insulator interface. An alternative to this traditional technique is to assemble the transistor on top of the organic semiconductor. We have used chemical-vapor deposition of the polymeric dielectric material parylene to create pentacene OTFTs with gate electrodes both on top of and below the semiconductor film, with field-effect mobilities as high as 0.1 cm2 V s and Ion Ioff ratios greater than 106 in the top-gated OTFTs. Comparing the electronic properties of top- and bottom-gate structures yields insight into the charge transport characteristics as well as the effects of device geometry, contacts, and surface roughness of the organic thin film.
Bibliographical noteFunding Information:
One of the authors (C.R.N.) thanks the U.S. Army Research Office for a NDSEG Fellowship. Another author (M.J.P) thanks the NSF for support provided through a graduate research fellowship. This work was supported primarily by the MRSEC Program of the National Science Foundation under DMR-0212302. The authors thank Paul V. Pesavento, Jeffrey A. Merlo, and Sandra E. Fritz for useful discussions.