Abstract
Integration of Ge as the p-FET channel material for 22 nm and beyond technology nodes is receiving increasing attention. Furthermore, there is a growing consensus in the CMOS industry that III-Vs channels for n-FETs should be closely evaluated. This review examines choices for Ge integration with Si, and describes recent results from III-V channels with a high-k/metal gate stack. copyright The Electrochemical Society.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 343-354 |
| Number of pages | 12 |
| Journal | ECS Transactions |
| Volume | 3 |
| Issue number | 2 |
| DOIs | |
| State | Published - Dec 1 2006 |
| Event | Advanced Gate Stack, Source/Drain, and Channel Engineering fo Si-Based CMOS 2: New Materials, Processes, and Equipment - 210th Electrochemical Society Meeting - Cancun, Mexico Duration: Oct 29 2006 → Nov 3 2006 |
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